On Wed, Dec 29, 2010 at 01:51:44PM +0100, Mark Kettenis wrote:
fwiw, I've had this sitting in my tree for a while with some other bits:
case 0x1a: /* Core i7/Xeon 5500 */
case 0x1e: /* Core i5/i7 */
case 0x1f: /* Core i5/i7 */
case 0x25: /* Core i3/i5/i7/Xeon 5600 */
case 0x2c: /* Core i3/i5/i7/Xeon 5600 */
perf_status = 0;
bus_clock = BUS133;
break;
case 0x2a: /* Sandy Bridge Core */
case 0x2d: /* Sandy Bridge Xeon */
perf_status = 0;
bus_clock = BUS100;
break;
case 0x1d: /* Xeon MP 7400 */
case 0x2e: /* Xeon 7500 */
default:
perf_status = 0;