Especially on MP kernels.
The hppa and i386/amd64 approach are rather similar. Both do an
atomic load and clear, which happens to be the only atomic instruction
available on hppa, and is easy to implement as an atomic swap with 0
on i386/amd64. But implementing this operation on other architectures
shouldn't be much more difficult, and should work just as well as the
proposed code that uses atomic_clearbits_int(). The MI code would
look something like:
void
netintr(void *unused)
{
int n;
n = atomic_load_and_clear(&netisr);
#define DONETISR(bit, fn) \
do { \
if (n & 1 << (bit)) \
fn(); \
} while ( /* CONSTCOND */ 0)
#include <net/netisr_dispatch.h>
}