Below is a somewhat important pci diff.  Please test this on machines
that have phrases likes:

mem address conflict
io address conflict
bridge io address conflict
bridge mem address conflict

Check whether the hardware still functions, including CardBus or
ExpressCard if you have it.

In particular, this will fix the IBM eServer x336.

Thanks,

Mark


Index: pci.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/pci.c,v
retrieving revision 1.71
diff -u -p -r1.71 pci.c
--- pci.c	23 Nov 2009 22:34:23 -0000	1.71
+++ pci.c	12 Jan 2010 09:02:00 -0000
@@ -531,12 +531,13 @@ pci_reserve_resources(struct pci_attach_
 {
 	pci_chipset_tag_t pc = pa->pa_pc;
 	pcitag_t tag = pa->pa_tag;
-	pcireg_t bhlc, blr, type;
+	pcireg_t bhlc, blr, csr, type;
 	bus_addr_t base, limit;
 	bus_size_t size;
 	int reg, reg_start, reg_end;
 	int flags;
 
+	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
 	bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
 	switch (PCI_HDRTYPE_TYPE(bhlc)) {
 	case 0:
@@ -554,7 +555,7 @@ pci_reserve_resources(struct pci_attach_
 	default:
 		return (0);
 	}
-    
+
 	for (reg = reg_start; reg < reg_end; reg += 4) {
 		if (!pci_mapreg_probe(pc, tag, reg, &type))
 			continue;
@@ -579,9 +580,14 @@ pci_reserve_resources(struct pci_attach_
 			    base, size, EX_NOWAIT)) {
 				printf("mem address conflict 0x%x/0x%x\n",
 				    base, size);
-				pci_conf_write(pc, tag, reg, 0);
-				if (type & PCI_MAPREG_MEM_TYPE_64BIT)
-					pci_conf_write(pc, tag, reg + 4, 0);
+				if (csr & PCI_COMMAND_MEM_ENABLE) {
+					extent_alloc_region(pa->pa_memex,
+					    base, size, EX_NOWAIT | EX_CONFLICTOK);
+				} else {
+					pci_conf_write(pc, tag, reg, 0);
+					if (type & PCI_MAPREG_MEM_TYPE_64BIT)
+						pci_conf_write(pc, tag, reg + 4, 0);
+				}
 			}
 			break;
 		case PCI_MAPREG_TYPE_IO:
@@ -589,7 +595,12 @@ pci_reserve_resources(struct pci_attach_
 			    base, size, EX_NOWAIT)) {
 				printf("io address conflict 0x%x/0x%x\n",
 				    base, size);
-				pci_conf_write(pc, tag, reg, 0);
+				if (csr & PCI_COMMAND_IO_ENABLE) {
+					extent_alloc_region(pa->pa_memex,
+					    base, size, EX_NOWAIT | EX_CONFLICTOK);
+				} else {
+					pci_conf_write(pc, tag, reg, 0);
+				}
 			}
 			break;
 		}