netbsd-tech-kern mailing list

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Andrew Doran
Thread benchmarks, round 2
So, I learned a few things since I put up the previous set of benchmarks: - The erratic behaviour from Linux is due to the glibc memory allocator. Using Google's tcmalloc, the problem disappears. - I missed a few things when porting jemalloc from FreeBSD. One of them was fairly major. Due to my mistake jemalloc on NetBSD was, basically, single threaded. That said it did show a noticable improvement over phkmalloc. - There was a nasty performance bug in NetBSD's pthread mutexes, which ...
Oct 4, 7:04 pm 2007
Joerg Sonnenberger
MI interrupt description
Hi all, is it possible to define platform independent definitions for normal interrupt routing constants? From x86 we have to distinguish at least between Active Low / Active High and Edge / Level triggered interrupts. I want to push this into the IOAPIC and i8259 handling on x86 at some point as the current code is a mess abusing the IOAPIC constants in many places, so I would like to see if we can come up with a generic list. Joerg
Oct 4, 2:23 pm 2007
David Laight
Re: MI interrupt description
If you want to do this generically, you need to allow for interrupts to be triggered on either the rising, falling or both edges. In the past I've had to pass the level/edge info in the high bits of the priority field in order to save device drivers having to know the gory details of interrupt routing (that was an SA1100/1101 system running an OS I never want to have to handle again). David -- David Laight: david@l8s.co.uk
Oct 4, 3:57 pm 2007
Joerg Sonnenberger
Re: MI interrupt description
Do we have any cases for the third? Active High and Active Low are the other two cases. I don't think this is exposed to normal drivers, just bus drivers and PICs. Joerg
Oct 4, 4:20 pm 2007
Michael Lorenz
Re: MI interrupt description
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, macppc distinguishes only between edge and level triggered. While there - what about IPLs ? have fun Michael -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.7 (Darwin) iQEVAwUBRwU6PcpnzkX8Yg2nAQIy1Af/SZf9HkRbfpiDcPYQfnvRwxZ1W8zRkLRV /7iMxj7SasRpcLiogNU1EKTSFgMHUitDnCngQESHtYsp42KNFZfGFl43uMO17EYO wgCBQ1Fgtc2NFjBVQIF+jS7fPwWJkzISHJkAGv8Zi59KF1Ep+jYWKWfCqZnYJfNg GRm7B5MbRtkWeorVhU4xhkf1D1JsS6sjtndJkHnoOqruSCs5kcm26L36x4b2z3As t3JSbz...
Oct 4, 3:08 pm 2007
Joerg Sonnenberger
Re: MI interrupt description
I'm mostly concerned about the information needed for PIC programming. The IPL handling is independent of that. Joerg
Oct 4, 3:11 pm 2007
C. K.
ACPI Error (psparse-0626)
Hi, I'm getting ACPI error while booting. It boots successfully, but messages are annoying. --------------------------------------- Oct 4 07:16:39 localhost /netbsd: acpi0 at mainbus0: Advanced Configuration and Power Interface Oct 4 07:16:39 localhost /netbsd: acpi0: using Intel ACPI CA subsystem version 20060217 Oct 4 07:16:39 localhost /netbsd: acpi0: X/RSDT: OemId <ACRSYS,ACRPRDCT,06040000>, AslId < LTP,00000000> Oct 4 07:16:39 localhost /netbsd: acpi0: SCI interr...
Oct 4, 10:08 am 2007
Joerg Sonnenberger
Re: ACPI Error (psparse-0626)
This are harmless notes that we don't support some of the ACPI devices This is likely just a mismatched device. Will be interesting to trace This will be ignored in the future or at least attached somewhat more intelligent. Joerg
Oct 4, 11:25 am 2007
Mindaugas R.
Implementation of SCHED_M2 scheduler
Hello, here is the new scheduler implementation, based on the original approach of SVR4, which also has various modifications in balancing and migration part mostly based on Solaris approach (described in Solaris Internals). It provides separate real-time (RT) and time-sharing (TS) queues, to differ the kernel and user threads and provide POSIX real-time extensions. Please note, that priority model (with separation of RT/TS ranges) has changed in vmlocking branch. Also, the support for thread affin...
Oct 4, 9:57 am 2007
Andrew Doran
Re: Implementation of SCHED_M2 scheduler
The above graph from the 4x cpu system is with sysbench run remotely. When run locally on the same 4x system SCHED_M2 delivers a massive improvement in throughput: http://www.netbsd.org/~ad/m2-local.png Really nice work! Andrew
Oct 4, 6:14 pm 2007
George Georgalis
Re: security/36712: tar extraction cause cannot create pipe,...
I've not been able to reproduce the lockups on LSI fibre, with RAM physically reduced to 2GB. If someone thinks this is a softupdates issue I can try using them. But it seems a kernel initialization issue, something in addition to vm.bufmem_lowater and vm.bufmem_hiwater settings when there is more than 2GB on amd64. BTW this is a Dual Opteron supermicro H8DME-2 Socket F Motherboard w/ 2216HE processors. I don't think this is a security issue anymore, the category should be kern. Also this is...
Oct 4, 12:41 pm 2007
Mindaugas R. Oct 4, 8:18 am 2007
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