Anyone know for sure if the Atheros hardware computes the IV for WEP? The keytables vary depending on the hardware: 5210 has 64 for keytable size 5211 and 5212 have 128 for keytable size Just as an example, WEP 40-bit = 40-bit entered key + 24 bit IV = 64-bit WEP 128-bit = 128-bit entered key + 24 bit IV = 152-bit Do we hope to get the IV from the hardware? Luis ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Wrong. WEP 128-bit = 104-bit entered key + 24 bit IV = 128 bit Bye, Mike ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
That depends on who you ask...marketing guys like bigger numbers and therefore mean the 104+24 variant when they say 'WEP128'. Engineers like to be precise and usually say 'WEP104' when they refer to the 104+24 variant. Longer WEP key lengths are not mentioned in the original 802.11 standard. If you look a bit closer into the 802.11i document, you will find that the 104+24 variant is called 'WEP104'. By the time 802.11i came out, 'WEP128' however already had become such a widely accepted term that it is difficult to get out of people's heads - though this marketing term is a major annoyance. We regularly had customers who complained that they could only enter 104 bits of key data for WEP128... Atheros chips provide both variants (104+24 and 128+24), so it's probably better to explicitly speak of '40 bit WEP keys' or '104 bit WEP keys' and avoid the terms WEP64/128 where possible. I heard that some TI-based cards even support WEP256 - whatever this means (256+24 or 232+24)... Best regards Alfred Arnold -- Alfred Arnold E-Mail: alfred@ccac.rwth-aachen.de Computer Club at the http://john.ccac.rwth-aachen.de:8000/alf/ Technical University Phone: +49-241-406526 of Aachen Fax: +49-241-406527 ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
No, it doesn't. The hardware will automatically append the WEP ICV, Michael hash (if told so) or AES MAC, but the WEP IV resp. AES/TKIP sequence numbers have to be provided by the host as part of the transmit buffer. The IV resp. TSC is located between the 802.11 header and the data payload. Note that on all Atheros chips except for the 5210, there must be a padding between the 802.11 header and the IV/TSC if the header length is not a multiple of four. Best regards Alfred Arnold -- Alfred Arnold E-Mail: alfred@ccac.rwth-aachen.de Computer Club at the http://john.ccac.rwth-aachen.de:8000/alf/ Technical University Phone: +49-241-406526 of Aachen Fax: +49-241-406527 ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
