> > >> actualy, should be UHH_SYSCONFIG:SOFTRESET.
quoted text
> > >
> > >That would reset the controller and so all the register would get
> > >their default values.
> >
> > aa, ok. I mis-read, you want to reset the PHY only. Still, the boards
> > without the reset line, won't work, so a better solution (if any) has to
> > be found.
> 
> I agree.
> 
> >
> > Maybe driving port reset signal would make PHY act ?
> >
> Do you mean to reset PHY using PHY reset command over ULPI ?
> Anyways would try this.

Soft resetting the PHY also fixes the issue. Here is the version-2 of
This patch.

-Ajay
--------  cut here -------------

Currently devices don't get detected automatically if the ehci
module is inserted 2nd time onward. We need to disconnect and
reconnect the device for it to get detected and enumerated.

Resetting the USB PHY using PHY reset command over ULPI fixes
this issue. Tested on OMAP3EVM.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
---
 drivers/usb/host/ehci-omap.c |   27 +++++++++++++++++++++++++++
 1 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 5450e62..dec05fb 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -126,6 +126,13 @@
 #define	EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT		8
 #define	EHCI_INSNREG05_ULPI_WRDATA_SHIFT		0
 
+/* ULPI Function Control set register */
+#define	FUNCTION_CTRL_SET_OFFSET			0x5
+#define	ULPI_FUNCTION_CTRL_SET_SUSPENDM			(1 << 6)
+#define	ULPI_FUNCTION_CTRL_SET_RESET			(1 << 5)
+#define	ULPI_FUNCTION_CTRL_SET_OPMODE			(3 << 3)
+#define	ULPI_FUNCTION_CTRL_SET_TERMSELECT		(1 << 2)
+#define	ULPI_FUNCTION_CTRL_SET_XCVRSELECT		(3 << 0)
 /*-------------------------------------------------------------------------*/
 
 static inline void ehci_omap_writel(void __iomem *base, u32 reg, u32 val)
@@ -425,6 +432,26 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
 			gpio_set_value(omap->reset_gpio_port[1], 1);
 	}
 
+	/* Soft reset the PHY using PHY reset command over ULPI */
+	if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) {
+		reg = ULPI_FUNCTION_CTRL_SET_RESET
+			| ULPI_FUNCTION_CTRL_SET_SUSPENDM
+			| (0x5 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) /* F_CTRL */
+			| (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) /* WRITE */
+			| (1 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) /* PORT1 */
+			| (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT); /* START */
+		ehci_omap_writel(omap->ehci_base, EHCI_INSNREG05_ULPI, reg);
+	}
+	if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) {
+		reg = ULPI_FUNCTION_CTRL_SET_RESET
+			| ULPI_FUNCTION_CTRL_SET_SUSPENDM
+			| (0x5 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) /* F_CTRL */
+			| (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) /* WRITE */
+			| (2 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) /* PORT2 */
+			| (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT); /* START */
+		ehci_omap_writel(omap->ehci_base, EHCI_INSNREG05_ULPI, reg);
+	}
+
 	return 0;
 
 err_sys_status:
-- 
1.6.2.4

--------- end ------------------
--
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