On Fri, 3 Jul 2009, Yang Fei-AFY095 wrote:

quoted text
> In drivers/usb/core/hcd.c, usb_hcd_submit_urb -> map_urb_for_dma ->
> dma_map_single -> dma_cache_maint.
> dma_map_single is defined in arch/arm/include/asm/dma-mapping.h
> 
> This is called when we submit urb, for OUT data, I think it's sufficient
> for cache consistency. But what I need to know is how we guarantee the  
> cache consistency for IN data, because the DMA is going to update the   
> physical memory when receiving data from device, something has to be    
> done upon completion of the urb.

I don't know what dma_cache_maint does.  If it causes the cache line to
be written back to memory, that's sufficient for OUT transfers.  If it
invalidates the cache line, that's sufficient for IN transfers.  
Nothing special is needed when the URB completes; when the CPU wants to 
access the buffer it will be forced to read the data from RAM.

On Sat, 4 Jul 2009, Ming Lei wrote:

quoted text
> > Since the ARM core of TI-OMAP is not cache coherent, it seems
> > dma_unmap_*() should do something(such as invalidate cache)
> > instead of nothing.
> 
> dma_map_*() can invalidate cache lines, so dma_unmap_*() may do nothing.
> But if someone accesses the dma buffer during dma transfer, you may
> get the  inconsistent result.

Correct.  In this case, nothing should be accessing the dma buffer 
during the transfer.

Alan Stern

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