On Sat, 15 Dec 2007, Laurent Pinchart wrote:As far as I know, neither EHCI nor OHCI hardware offers any reasonable way to schedule transactions in separate frames, unless the device runs at low speed (in which case it wouldn't be handled by EHCI anyway). It does seem odd that a device with an interface designed to run at high speed would be crippled so that it couldn't take advantage of that speed. Above you said the device misses the status-stage interrupt. Do you know which one actually causes the problem? It's worth mentioning that the device doesn't have any trouble handling the control transfers during enumeration. But that may be understandable, because they are probably handled by very different code in the firmware. I'd have to go back and check to be certain, but I don't recall the bus traces I've seen of Windows high-speed transfers showing that the transactions making up a control message are scheduled in different frames (or micro-frames). Alan Stern - To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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