Andi Kleen wrote:In the pre-MSI-X days, you'd have cachelines bouncing all over the place if you distributed networking interrupts across CPUs, particularly given that NAPI would run some things on a single CPU anyway. Today, machines are faster, we have multiple interrupts per device, and we have multiple RX/TX queues. I would be interested to see hard numbers (as opposed to guesses) about various new ways to distributed interrupts across CPUs. What's the best setup for power usage? What's the best setup for performance? Are they the same? Is it most optimal to have the interrupt for socket $X occur on the same CPU as where the app is running? If yes, how to best handle when the scheduler moves app to another CPU? Should we reprogram the NIC hardware flow steering mechanism at that point? Interesting questions, and I hope we'd see some hard number comparisons before solutions start flowing into the kernel. Jeff -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
| Tony Lindgren | [PATCH 26/90] ARM: OMAP: abstract debug card setup (smc, leds) |
| Greg Kroah-Hartman | [PATCH 001/196] Chinese: Add the known_regression URI to the HOWTO |
| Vladislav Bolkhovitin | Re: Integration of SCST in the mainstream Linux kernel |
| Jesper Juhl | Re: Dual-Licensing Linux Kernel with GPL V2 and GPL V3 |
git: | |
| Gerrit Renker | [PATCH 27/37] dccp: Integration of dynamic feature activation - part 2 (server side) |
| Jarek Poplawski | [PATCH] pkt_sched: Destroy gen estimators under rtnl_lock(). |
| David Miller | [GIT]: Networking |
| Frans Pop | svc: failed to register lockdv1 RPC service (errno 97). |
