From: PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>
When changing DCB parameters, ixgbe needs to have the MAC reset. The way
the flow control code is setup today, PFC will be disabled on a reset.
This patch adds a new flow control type for PFC, and then has the netlink
layer take care of toggling which type of flow control to enable.
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_common.c | 23 +++++++++++++++++++++--
drivers/net/ixgbe/ixgbe_dcb_82598.c | 1 -
drivers/net/ixgbe/ixgbe_dcb_82599.c | 3 ---
drivers/net/ixgbe/ixgbe_dcb_nl.c | 2 ++
drivers/net/ixgbe/ixgbe_type.h | 3 +++
5 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c
index 245db0e..8cfd3fd 100644
--- a/drivers/net/ixgbe/ixgbe_common.c
+++ b/drivers/net/ixgbe/ixgbe_common.c
@@ -1654,9 +1654,10 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
* 0: Flow control is completely disabled
* 1: Rx flow control is enabled (we can receive pause frames,
* but not send pause frames).
- * 2: Tx flow control is enabled (we can send pause frames but
- * we do not support receiving pause frames).
+ * 2: Tx flow control is enabled (we can send pause frames but
+ * we do not support receiving pause frames).
* 3: Both Rx and Tx flow control (symmetric) are enabled.
+ * 4: Priority Flow Control is enabled.
* other: Invalid.
*/
switch (hw->fc.current_mode) {
@@ -1686,6 +1687,11 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
mflcn_reg |= IXGBE_MFLCN_RFCE;
fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X;
break;
+#ifdef CONFIG_DCB
+ case ixgbe_fc_pfc:
+ goto out;
+ break;
+#endif
default:
hw_dbg(hw, "Flow control param set incorrectly\n");
ret_val = -IXGBE_ERR_CONFIG;
@@ -1746,6 +1752,7 @@ s32 ixgbe_fc_autoneg(struct ixgbe_hw ...