Re: ixp4xx_hss modifications for 2x4 HDLC

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From: Krzysztof Halasa
Date: Tuesday, February 24, 2009 - 4:38 pm

Hi,

Miguel Ángel Álvarez <gotzoncabanes@gmail.com> writes:


Well, I guess it's a bit like a proof of concept rather than
an applicable patch? :-)

And it's based on "chan" branch. This isn't good, the "chan" isn't yet
ready to go upstream, the interface isn't yet stable. It's really
experimental, based on undocumented behaviour etc. Do you need the
"channelized" feature? If not, perhaps you should stick to HDLC-only
David's net-next?

Ok. The following doesn't IMHO make sense:


There are only two HSS devices on the chip. Not 8 :-)


Same here.

This only needs a tiny change, increasing the number of HDLC devices
to 2 or 4 (for each HSS), adding the extra queue numbers etc.

This is completely orthogonal to:
a) clocks
b) channelized "services"
c) sync options (excluding 1024-bit max length).

The clock generator is a different thing and needs to be investigated.
Copying Intel's table doesn't make sense here (especially given the
internal clocks are rarely used). Do you need internal clocks?

Channelized thing needs a stable userspace interface first, it really
have to be discussed on netdev.

Sync options are simply independent.

I know I promised you I'll look at this stuff soon. Unfortunately, that
"soon" is a bit less "soon" than I though. Will look when able,
currently I'm really overwhelmed.
-- 
Krzysztof Halasa
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Messages in current thread:
ixp4xx_hss modifications for 2x4 HDLC, Miguel Ángel Álvarez, (Tue Feb 24, 5:47 am)
Re: ixp4xx_hss modifications for 2x4 HDLC, Krzysztof Halasa, (Tue Feb 24, 4:38 pm)
Re: ixp4xx_hss modifications for 2x4 HDLC, Miguel Ángel Álvarez, (Wed Feb 25, 1:43 am)