On Mon, 26 May 2008, Krzysztof Halasa wrote:

quoted text
> Bill Fink <billfink@mindspring.com> writes:
> 
> > Another idea that occured to me:  How about using the low order bits
> > of the instruction memory address being executed that was interrupted
> > by the HZ timer interrupt.
> 
> Think of constant-instructions-length processors :-)

I'm not sure what you're driving at, but if it's that you shouldn't
use the very last 2 or 3 bits, then sure those should be excluded.
But that still leaves 9 or 10 bits at least in the page offset, and
that's being conservative in the number of address bits to sample.

						-Bill
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