> [Ram] I am assuming that this is with regards to msi-x interrupts. We

Yes. 

And avoiding bouncing locks for device state between CPUs.

quoted text
> have done away with handling tx completion in the interrupt handler, and
> are instead handling them in the context of the transmit. The slow path,
> straggling transmit completions will be handled in the timer context.

Ok -- hopefully you don't have bad corner cases from this when the pipe
is not fully filled and then causing longer latencies on completion. 
Old NAPI sometimes suffered from such problems. 

-Andi
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