PCI-E Link training bug

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From: Jeff Roberson
Date: Tuesday, August 3, 2010 - 3:36 am

Hello Folks,

At least one intel chipset will occasionally negotiate a 4x link for an 8x 
device in an 8x port.  It is a known errata in the 5400 mch.  Simply 
disabling and re-enabling the link is all that is required to restore full 
throughput.  Toggling the retrain bit in the pci-e link control register 
alone is insufficient.

I have added a small bit of code to the pcie port device which checks for 
this condition and attempts to retrain the link.  It is possible that it 
will give a false positive if the port is capable of accepting lesser 
width devices.  This should be harmless although I would not rule out poor 
implementations having issues with gratuitous retraining.

Thanks,
Jeff
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Messages in current thread:
PCI-E Link training bug, Jeff Roberson, (Tue Aug 3, 3:36 am)
Re: PCI-E Link training bug, Valdis.Kletnieks, (Tue Aug 3, 5:30 am)
Re: PCI-E Link training bug, Jesse Barnes, (Tue Aug 3, 8:52 am)