On Thu, 2010-08-19 at 17:58 -0400, Don Zickus wrote:
quoted text > On Thu, Aug 19, 2010 at 04:27:13PM +0200, Peter Zijlstra wrote:
> > x86_pmu.drain_pebs(regs);
> > + }
> >
> > for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
> > struct perf_event *event = cpuc->events[bit];
> >
> > + handled++;
> > +
> > if (!test_bit(bit, cpuc->active_mask))
> > continue;
>
> Sorry I didn't notice this earlier, but I think you want that handled++
> after the if(..) continue pieces. Otherwise you will always have a number
> >1. :-)
Only if there's any remaining set bits in the overflow status reg,
right?
But if we want to be paranoid, we should also check if the event that
generated the overflow actually had the INT flag enabled, I guess ;-)
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Messages in current thread:
Re: [PATCH -v3] perf, x86: try to handle unknown nmis with ... , Peter Zijlstra , (Fri Aug 20, 1:50 am)