Re: [PATCH -mm 1/2] scsi: remove dma_is_consistent usage in 53c700

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From: James Bottomley
Date: Sunday, June 27, 2010 - 8:08 am

On Sun, 2010-06-27 at 19:10 +0900, FUJITA Tomonori wrote:

Actually, that's not the right explanation.  The BUG_ON is because of an
efficiency in the driver ... it's nothing to do with the architecture.

The driver uses a set of mailboxes, but for efficiency's sake, it packs
them into a single coherent area and separates the different usages by a
L1 cache stride).  On architectures capable of manufacturing coherent
memory, this is a nice speed up in the DMA infrastructure.  However, for
incoherent architectures, it's fatal if the dma coherence stride is
greater than the L1 cache size, because now we'll get data corruption
due to cacheline interference.  That's what the BUG_ON is checking for.


Well, we can't check in the architecture because it's a driver specific
thing ... I suppose making it a rule that dma_get_cache_alignment()
*must* be <= L1_CACHE_BYTES fixes it ... we seem to have no architecture
violating that, so just add it to the documentation, and the check can
go.

James


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Messages in current thread:
[PATCH -mm 2/2] remove dma_is_consistent() API, FUJITA Tomonori, (Sun Jun 27, 3:10 am)
Re: [PATCH -mm 1/2] scsi: remove dma_is_consistent usage i ..., James Bottomley, (Sun Jun 27, 8:08 am)