The original CrystalHD driver assumes a little endian bitfield host.
This patch adds support for big-endian bitfield hosts.
It was tested by verifying the values of all hardware register accesses
on a big-endian host were equal to a little-endian host.
The use of bitfields is discouraged for hardware access, so this needs
to be rewritten to use macro definitions at some point.
Signed-off-by: Leon Woestenberg <leon@sidebranch.com>
--- git.orig/drivers/staging/crystalhd/crystalhd_hw.h 2010-03-21 16:05:52.000000000 +0100
+++ git/drivers/staging/crystalhd/crystalhd_hw.h 2010-04-03 23:05:58.290430827 +0200
@@ -121,6 +121,7 @@
typedef union _intr_mask_reg_ {
struct {
+#ifdef __LITTLE_ENDIAN_BITFIELD
uint32_t mask_tx_done:1;
uint32_t mask_tx_err:1;
uint32_t mask_rx_done:1;
@@ -129,6 +130,16 @@
uint32_t mask_pcie_rbusmast_err:1;
uint32_t mask_pcie_rgr_bridge:1;
uint32_t reserved:25;
+#else
+ uint32_t reserved:25;
+ uint32_t mask_pcie_rgr_bridge:1;
+ uint32_t mask_pcie_rbusmast_err:1;
+ uint32_t mask_pcie_err:1;
+ uint32_t mask_rx_err:1;
+ uint32_t mask_rx_done:1;
+ uint32_t mask_tx_err:1;
+ uint32_t mask_tx_done:1;
+#endif
};
uint32_t whole_reg;
@@ -137,10 +148,17 @@
typedef union _link_misc_perst_deco_ctrl_ {
struct {
+#ifdef __LITTLE_ENDIAN_BITFIELD //ok
uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/
uint32_t reserved0:3; /* Reserved.No Effect*/
uint32_t stop_bcm_7412_clk:1; /* 1 ->Stops branch of 27MHz clk used to clk BCM7412*/
uint32_t reserved1:27; /* Reseved. No Effect*/
+#else
+ uint32_t reserved1:27; /* Reseved. No Effect*/
+ uint32_t stop_bcm_7412_clk:1; /* 1 ->Stops branch of 27MHz clk used to clk BCM7412*/
+ uint32_t reserved0:3; /* Reserved.No Effect*/
+ uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/
+#endif
};
uint32_t whole_reg;
@@ -149,6 +167,7 @@
typedef union _link_misc_perst_clk_ctrl_ {
struct ...
