a.k.a. nest units", in order to support multiple hw pmu, Peter suggested
the first thing that needs to be done is get rid of all the __weak
functions (with exception of perf_callchain*, since that really is arch
specific), includes
hw_perf_group_sched_in
hw_perf_event_init
hw_perf_disable
hw_perf_enable
Peter Zijlstra <peterz@infradead.org> wrote:
This patch series is to remove hw_perf_group_sched_in() first.
patch 1: core, add group scheduling transactional APIs
patch 2: x86, implement group scheduling transactional APIs
patch 3: powerpc, implement group scheduling transactional APIs
patch 4: sparc, implement group scheduling transactional APIs
I have tested these patches on x86, but for powerpc and sparc it's only
cross build tested.
It's very appreciated if anybody has powerpc or sparc can help to test.
Thanks for any comment.
Changes log:
v2.
Change transaction flag(cpu_hw_events->group_flag) from u8 to unsigned
int. RISC architecture deals better with word sized variable than u8.
(Peter Zijlstra)
Rename callback names, *_txn -> *_group_trans for better readability.
Add a few comments to describe the callbacks. (Frederic Weisbecker)
v1.
remove __weak function hw_perf_group_sched_in() based on Peter's idea.
Thanks,
Lin Ming
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