On 04/15/2030 04:04 AM, Zhang, Yanmin wrote:
quoted text
>
>> An even more accurate way to determine this is to check whether the
>> interrupt frame points back at the 'int ' instruction.  However we
>> plan to switch to a self-IPI method to inject the NMI, and I'm not sure
>> wether APIC NMIs are accepted on an instruction boundary or whether
>> there's some latency involved.
>>      
> Yes. But the frame pointer checking seems a little complicated.
>    

An even bigger disadvantage is that it won't work with Sheng's patch, 
self-NMIs are not synchronous.

quoted text
>>>    	trace_kvm_entry(vcpu->vcpu_id);
>>> +
>>> +	percpu_write(current_vcpu, vcpu);
>>>    	kvm_x86_ops->run(vcpu);
>>> +	percpu_write(current_vcpu, NULL);
>>>
>>>        
>> If you move this around the 'int ' instructions you will close the
>> race, as a stray NMI won't catch us updating the rip cache.  But that
>> depends on whether self-IPI is accepted on the next instruction or not.
>>      
> Right. The kernel part has dependency on the self-IPI implementation.
> I will move above percpu_write(current_vcpu, vcpu) (or a new wrapper function)
> just around 'int '.
>
>    

Or create a new function to inject the interrupt in x86.c.  That will 
reduce duplication between svm.c and vmx.c.

quoted text
> Sheng would find a solution on the self-IPI delivery. Let's separate my patch
> and self-IPI as 2 issues as we don't know when the self-IPI delivery would be
> resolved.
>    

Sure.

-- 
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.

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