Groan. We have been through that exercise of blaming the above commit
and the C1E handling for a couple of times now. It never turned out to
be the real culprit.
Looking at the various steps Asbjorn took to analyse that problem it
simply boils down to the oldest problem with timers on ATI chipsets:
the irq0 timer interrupt routing is hosed
I have no clue yet, why this is not detected by the test logic we have
in place for that, but it might be something which gets borked later
in the boot process.
Enabling MSI for HPET just papers over the problem as it uses a
different interrupt vector and mechanism.
Disabling HPET does not help simply because PIT is using IRQ0 as well
as the MSI disabled HPET.
I need some sleep to come up with a reasonable method to debug that,
but maybe someone else has an brilliant idea before I have to twist my
brain around it.