On Thu, 11 Feb 2010, Sheng Yang wrote:
quoted text
> 
> The MSI/MSI-X is the target, but if we add more code then we want benefit from 
> them. Stick with LAPIC is no benefit I think.
> 

We wouldn't stick with LAPIC: the guest could still decide to use event
channels for all the vectors and LAPIC usage would be avoided, and it is
probably what is going to happen.


quoted text
> > You said that you are working on patches to make MSI devices work: maybe
> > seeing a working implementation of that would convince us about which one
> > is the correct approach.
> 
> Um, we don't want to show code to the community before it's mature. I can 
> describe one implementation: it add a hook in arch_setup_msi_irqs(), and write 
> the self-defined MSI data/addr(contained event channel information) to the PCI 
> configuration/MMIO; then hypervisor/qemu can intercept and parse it, then we 
> can get the event when real device's interrupt injected.
> 

your approach needs:

- global enable of evtchns in place of legacy irqs on the linux side
- special translation irq -> evtchn in irq.c on the xen side
- special requests of evtchns in place of MSIs on the linux side
  (touching generic kernel code)
- special handling of evtchns in place of MSIs on the qemu/xen side

the last two points are particularly worrying.
My approach needs:

- per vector enable of evtchns on the linux side
- special delivery of evtchns for guest's vectors in vlapic.c on the xen side

I think it is worth giving it a try, given that it is simpler and it
doesn't need any change in the generic kernel code.

In any case it seems to me that the MSI\evtchn work should be part of
this patch series, because it is difficult to understand if your
approach makes sense or not without it. We should probably just wait for
it to be complete before proceeding further.

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