On Thu, 16 Dec 2010 10:20:57 +0800, Hui Zhu <teawater@gmail.com> wrote:
quoted text
> On Wed, Dec 15, 2010 at 18:20, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > On Wed, 15 Dec 2010 17:28:45 +0800, Hui Zhu <teawater@gmail.com> wrote:
> >> lspci | grep Display
> >> 00:02.1 Display controller: Intel Corporation 82Q35 Express Integrated
> >> Graphics Controller (rev 02)
> >
> > Q35. I wasn't expecting that. Can you please add drm.debug=0xe to your
> > boot line and attach the dmesg from rc3 and rc5? Thanks.
> > -Chris
> >
> > --
> > Chris Wilson, Intel Open Source Technology Centre
> >
> 
> Thanks Chris.
> 
> I post the logs of rc3+, rc4+ and rc5+ in attchement.  Wish they can
> be more helpful.

The hotplug probe was failing. The only change along that path I could see
was to setting some hotplug flags in the analag adapter register. Can you
try this patch to see if it fixes things for you? Meanwhile I'll check the
docs for the validity of those flags for the various gen.

diff --git a/drivers/gpu/drm/i915/intel_crt.c
b/drivers/gpu/drm/i915/intel_crt.c
index 8df5743..14c276e 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -148,7 +148,9 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
                           dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
        }
 
-       adpa = ADPA_HOTPLUG_BITS;
+       adpa = 0;
+       if (INTEL_INFO(dev)->gen >= 4)
+               adpa |= ADPA_HOTPLUG_BITS;
        if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
                adpa |= ADPA_HSYNC_ACTIVE_HIGH;
        if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)

-- 
Chris Wilson, Intel Open Source Technology Centre
--
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