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Re: [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code

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From: Ralf Baechle
Subject: Re: [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
Date: Wednesday, October 20, 2010 - 12:19 am

Thanks, queued for 2.6.37.

  Ralf
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Messages in current thread:
[PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm47xx/ ..., Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH 2/9] MIPS: Add BMIPS processor types to Kconfig, Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH 3/9] MIPS: Add BMIPS CP0 register definitions, Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH 4/9] MIPS: Install handlers for software IRQs, Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH resend 5/9] MIPS: sync after cacheflush, Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH resend 6/9] MIPS: pfn_valid() is broken on low memo ..., Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH v2 resend 7/9] MIPS: Move FIXADDR_TOP into spaces.h, Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH resend 8/9] MIPS: Honor L2 bypass bit, Kevin Cernekee, (Sat Oct 16, 2:22 pm)
[PATCH resend 9/9] MIPS: Allow UserLocal on MIPS_R1 processors, Kevin Cernekee, (Sat Oct 16, 2:22 pm)
Re: [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm4 ..., Florian Fainelli, (Sun Oct 17, 9:59 am)
Re: [PATCH 2/9] MIPS: Add BMIPS processor types to Kconfig, Florian Fainelli, (Sun Oct 17, 10:01 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Shinya Kuribayashi, (Mon Oct 18, 6:44 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Kevin Cernekee, (Mon Oct 18, 11:34 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Ralf Baechle, (Mon Oct 18, 12:19 pm)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Kevin Cernekee, (Mon Oct 18, 12:41 pm)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Ralf Baechle, (Mon Oct 18, 3:50 pm)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Shinya Kuribayashi, (Mon Oct 18, 5:03 pm)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Maciej W. Rozycki, (Mon Oct 18, 5:45 pm)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Kevin Cernekee, (Mon Oct 18, 5:51 pm)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Maciej W. Rozycki, (Mon Oct 18, 5:57 pm)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Gleb O. Raiko, (Tue Oct 19, 1:54 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Ralf Baechle, (Tue Oct 19, 2:17 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Gleb O. Raiko, (Tue Oct 19, 3:15 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Ralf Baechle, (Tue Oct 19, 5:34 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Shinya Kuribayashi, (Tue Oct 19, 6:30 am)
Re: [PATCH resend 8/9] MIPS: Honor L2 bypass bit, Ralf Baechle, (Tue Oct 19, 9:16 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Maciej W. Rozycki, (Tue Oct 19, 1:11 pm)
Re: [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm4 ..., Ralf Baechle, (Wed Oct 20, 12:19 am)
Re: [PATCH 3/9] MIPS: Add BMIPS CP0 register definitions, Ralf Baechle, (Wed Oct 20, 12:23 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Gleb O. Raiko, (Wed Oct 20, 1:05 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Maciej W. Rozycki, (Wed Oct 20, 10:26 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Gleb O. Raiko, (Thu Oct 21, 1:52 am)
Re: [PATCH resend 9/9] MIPS: Allow UserLocal on MIPS_R1 pr ..., Ralf Baechle, (Thu Oct 21, 7:32 am)
Re: [PATCH 4/9] MIPS: Install handlers for software IRQs, Ralf Baechle, (Thu Oct 21, 7:44 am)
Re: [PATCH resend 5/9] MIPS: sync after cacheflush, Maciej W. Rozycki, (Sat Oct 23, 10:12 pm)