> From: linux-arm-kernel-bounces@lists.infradead.org [mailto:linux-arm-
quoted text
> kernel-bounces@lists.infradead.org] On Behalf Of Benjamin
> Herrenschmidt

quoted text
> > If you want the old way back, apply pressure to silicon vendors and
> > ARM Ltd to change the architecture to lift this restriction - which
> > will probably mean doing away with aggressive speculative
> prefetching
> > so that it's possible to predict what will be in the cache at any
> > point in time.
>
> Note that we have the exact same problem on powerpc. The only sane
> solution is that SoCs designed around such cores or versions of the
> architecture should be fully DMA coherent to avoid the need for funky
> mapping attributes. Anything else is garbage HW, but sadly, it looks
> like way too many idiots still find jobs as HW designers.

ARM has always been a rawer (and cheaper) environment than many other CPU architectures. Until maybe this year coherency was never even an option provided in the hardware. The vast majority of the systems currently in mass production in 2010 and before don't have coherency.  The software has to handle all the details.

Starting today and onwards coherency options will start to be seen in high end. It seems likely some of the old external IP won't be compliant and likely have bugs undercutting it.

People from high ends like x86 and PPC have different expectations and problems. Your chip set nightmares are our standard in some areas. In my narrow experience PPC pioneered many techniques 15 years back which are now just coming into ARM. They are coming in at a much reduced power and cost footprint.

Regards,
Richard W.

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