Jiri Kosina wrote:Okay, I just had a scary and hopefully stupid thought. Especially Intel often has backchannels between the chipset and the Ethernet controller for management functions -- anything from WoL to IPMI -- generally over some kind of low-speed serial bus. We're not in a situation where the EEPROM can be touched from the chipset via the SMBus or some other non-CPU channel? -hpa --
