[PATCH 14/23] AMD IOMMU: don't assing preallocated protection domains to devices

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From: Joerg Roedel
Date: Wednesday, September 17, 2008 - 9:52 am

In isolation mode the protection domains for the devices are
preallocated and preassigned. This is bad if a device should be passed
to a virtualization guest because the IOMMU code does not know if it is
in use by a driver. This patch changes the code to assign the device to
the preallocated domain only if there were dma mapping requests for it.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
 arch/x86/kernel/amd_iommu.c       |   43 ++++++++++++++++++++++++++++++++----
 include/asm-x86/amd_iommu_types.h |    6 +++++
 2 files changed, 44 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 0410be1..09d5e92 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -33,6 +33,10 @@
 
 static DEFINE_RWLOCK(amd_iommu_devtable_lock);
 
+/* A list of preallocated protection domains */
+static LIST_HEAD(iommu_pd_list);
+static DEFINE_SPINLOCK(iommu_pd_list_lock);
+
 /*
  * general struct to manage commands send to an IOMMU
  */
@@ -663,6 +667,7 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
 	dma_dom->next_bit = 0;
 
 	dma_dom->need_flush = false;
+	dma_dom->target_dev = 0xffff;
 
 	/* Intialize the exclusion range if necessary */
 	if (iommu->exclusion_start &&
@@ -769,6 +774,33 @@ static bool check_device(struct device *dev)
 }
 
 /*
+ * In this function the list of preallocated protection domains is traversed to
+ * find the domain for a specific device
+ */
+static struct dma_ops_domain *find_protection_domain(u16 devid)
+{
+	struct dma_ops_domain *entry, *ret = NULL;
+	unsigned long flags;
+
+	if (list_empty(&iommu_pd_list))
+		return NULL;
+
+	spin_lock_irqsave(&iommu_pd_list_lock, flags);
+
+	list_for_each_entry(entry, &iommu_pd_list, list) {
+		if (entry->target_dev == devid) {
+			ret = entry;
+			list_del(&ret->list);
+			break;
+		}
+	}
+
+	spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
+
+	return ret;
+}
+
+/*
  * In the dma_ops path we only have the struct device. This function
  * finds the corresponding IOMMU, the protection domain and the
  * requestor id for a given device.
@@ -803,9 +835,11 @@ static int get_device_resources(struct device *dev,
 	*iommu = amd_iommu_rlookup_table[*bdf];
 	if (*iommu == NULL)
 		return 0;
-	dma_dom = (*iommu)->default_dom;
 	*domain = domain_for_device(*bdf);
 	if (*domain == NULL) {
+		dma_dom = find_protection_domain(*bdf);
+		if (!dma_dom)
+			dma_dom = (*iommu)->default_dom;
 		*domain = &dma_dom->domain;
 		set_device_domain(*iommu, *domain, *bdf);
 		printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
@@ -1257,10 +1291,9 @@ void prealloc_protection_domains(void)
 		if (!dma_dom)
 			continue;
 		init_unity_mappings_for_device(dma_dom, devid);
-		set_device_domain(iommu, &dma_dom->domain, devid);
-		printk(KERN_INFO "AMD IOMMU: Allocated domain %d for device ",
-		       dma_dom->domain.id);
-		print_devid(devid, 1);
+		dma_dom->target_dev = devid;
+
+		list_add_tail(&dma_dom->list, &iommu_pd_list);
 	}
 }
 
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
index 1c9d8d4..56dc6bd 100644
--- a/include/asm-x86/amd_iommu_types.h
+++ b/include/asm-x86/amd_iommu_types.h
@@ -227,6 +227,12 @@ struct dma_ops_domain {
 
 	/* This will be set to true when TLB needs to be flushed */
 	bool need_flush;
+
+	/*
+	 * if this is a preallocated domain, keep the device for which it was
+	 * preallocated in this variable
+	 */
+	u16 target_dev;
 };
 
 /*
-- 
1.5.6.4


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Messages in current thread:
[PATCH 0/23] AMD IOMMU 2.6.28 updates for review, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 06/23] AMD IOMMU: add event buffer allocation, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 08/23] AMD IOMMU: save pci_dev instead of devid, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 09/23] AMD IOMMU: add MSI interrupt support, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 10/23] AMD IOMMU: add event handling code, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 11/23] AMD IOMMU: enable event logging, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 13/23] AMD IOMMU: add dma_supported callback, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 14/23] AMD IOMMU: don't assing preallocated protect ..., Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 18/23] AMD IOMMU: simplify dma_mask_to_pages, Joerg Roedel, (Wed Sep 17, 9:52 am)
[PATCH 23/23] add AMD IOMMU tree to MAINTAINERS file, Joerg Roedel, (Wed Sep 17, 9:52 am)
Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, FUJITA Tomonori, (Wed Sep 17, 12:20 pm)
Re: [PATCH 18/23] AMD IOMMU: simplify dma_mask_to_pages, FUJITA Tomonori, (Wed Sep 17, 12:20 pm)
Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, FUJITA Tomonori, (Wed Sep 17, 6:29 pm)
Re: [PATCH 18/23] AMD IOMMU: simplify dma_mask_to_pages, Joerg Roedel, (Thu Sep 18, 12:32 am)
Re: [PATCH 18/23] AMD IOMMU: simplify dma_mask_to_pages, FUJITA Tomonori, (Thu Sep 18, 8:57 am)
Re: [PATCH 18/23] AMD IOMMU: simplify dma_mask_to_pages, Joerg Roedel, (Thu Sep 18, 9:39 am)
Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, FUJITA Tomonori, (Thu Sep 18, 4:10 pm)
Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, FUJITA Tomonori, (Fri Sep 19, 3:21 am)
Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, FUJITA Tomonori, (Fri Sep 19, 11:40 am)
RE: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, Keshavamurthy, Anil S, (Fri Sep 19, 11:47 am)
Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing, Muli Ben-Yehuda, (Sat Sep 20, 10:27 pm)