* FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> wrote:

quoted text
> On Tue, 16 Sep 2008 19:58:24 +0200
> Andi Kleen <andi@firstfloor.org> wrote:
> 
> > > > Those always are handled elsewhere in the block layer (using the bounce_pfn
> > > > mechanism)
> > > 
> > > I don't think that the bounce guarantees that dma_alloc_coherent()
> > > returns an address that a device can access to.
> > 
> > dma_alloc_coherent() is not used for block IO data. And dma_alloc_coherent()
> > does handle masks > 24bit < 32bits just fine.
> 
> What do you mean? For example, some aacraid cards have 31bit dma
> mask. What guarantees that IOMMUs's dma_alloc_coherent don't return a
> virtual address > 31bit < 32bit?
> 
> 
> > > I'm not familiar with what the networking does, for example, seems
> > > that b44 sets dev->dma_mask to DMA_30BIT_MASK and b44_start_xmit()
> > > does:
> > > 
> > 
> > b44 (and related designs like the bcm wireless chipset) 
> > has its own bouncing scheme. IT doesn't need any hacks in map_sg
> >  
> > > IOMMUs can try to return an address that the NIC can access to.
> > 
> > It's not worth to handle this strange case. The drivers do anyways. 
> > These are very cheap devices which are only rarely used in systems 
> > with >2GB and for those cases the existing bouncing setup works 
> > fine.
> 
> I think that the patch is a pretty straightforward, it just the same 
> thing that IOMMUs with > 32bits virtual address space do. We can do 
> better with the simple patch. But I'm ok with dropping the patch for 
> GART since we can live without the patch, as you said.

no - any extra layer of robustness is good in such a critical piece of 
code. Perhaps also emit a one-time printk if you really consider the use 
as a potential sign of bugs, but dont remove robustness.

	Ingo
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