Hi, the platform I am working on right now (ARM) has a so called 'TCM'
(tightly coupled memory) that is some 8 to 32kB of SRAM in the chip, no
waitstates, very high bandwidth, and it is possible to access it *while*
accessing main memory. It may be a very good thing (for example) to
implement a software FIFO to be used in ISRs or such.
Do you know of any implementation of such software FIFO or any other
kernel driver for TCMs?
bye
Alessio
--