Thanks for your quick reply. I know there are 4 physical interrupt
lines, interleaved for the many devices connected to a bus, so that, if
most of the devices issue INTA, the interrupts are actually asserted on
different pins of the apic (an almost uniform distribution of the
interrupts, but still, two devices can share the same physical line). I
also know that it's possible to change the (logical) irq levels assigned
to physical INTA-INTD (perhaps using the pirq= parameter).
As I have limited knowledge of hardware implementations, I'm asking you
if it's usual/possible for a dual-processor system to have the same
physical irq pin connected to the same irq line of _different_ pci
buses. To put it in other words, is it possible for two devices on
_separate_ pci buses to physically share the same irq pin?
Thanks,
Radu Rendec
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