Cc: Rafael J. Wysocki <rjw@...>, Linux Kernel Mailing List <linux-kernel@...>, Jeff Garzik <jeff@...>, Tejun Heo <htejun@...>, Ingo Molnar <mingo@...>, David Witbrodt <dawitbro@...>, Andrew Morton <akpm@...>, Kernel Testers <kernel-testers@...>
Heh. That's how PCI sizing works: you write all ones to the register, and
read back the result. The low bits won't change, and that indicates the
size.
But if _none_ of the bits change, then that simply means that the size
will be calculated to be 0xffffffff-start.
So the sizing will "work", it will just always report that the BAR covers
everything from start to the 4G limit.
Linus
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