On Sat, Aug 30, 2008 at 12:14 PM, Linus Torvalds

 wrote:

quoted text
>

>

> On Sat, 30 Aug 2008, Linus Torvalds wrote:

>>

>> We simply shouldn't try to compare the BAR start with randomly chosen

>> things.

>

> Btw, looking at that bogus BAR#3 some more: I don't actually think it's

> even an MCFG resource.

>

> I think it's literally the resource that describes the HT window for the

> host bridge. So it's literally like the "root" resource - all external

> MMIO resources that go over HT have to be in that window.

his system only has one HT chain...
>

quoted text
> IOW, I'm starting to think that it's not even broken. It is probably

> perfectly real. It's not a "PCI bridge" in the sense that it doesn't

> bridge one PCI bus to another, but it's a host bridge, and it bridges the

> CPU memory accesses to another bus.

>

> The fact that the MCFG area happens to be at the start of that window is

> probably just a random detail.

AMD CPU/NB (quad core aka fam 10h later) has MSR to state MMCONFIG, and

 the ATI bridge BAR that have same address for MMCONFIG not even have

chance to decode that.

because NB intercept that already.
>

quoted text
> Does anybody know how to find chipset docs for AMD/ATI chipsets? I find

> CPU docs, and the GPU docs, but not the 790 chipset docs anywhere (yeah,

> it looks promising with a link that says "AMD 790FX Chipset

> Specifications", but the link just takes you to some trivial overview, not

> any actual specs.

it seems ATI chipset doesn't have public version of doc...like reg

info and BIOS/Kernel porting guide.
YH

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