Linus Torvalds wrote:

quoted text
>

> On Thu, 28 Aug 2008, H. Peter Anvin wrote:

>>     The sucky case, of course, would be an uninitialized BAR pointing

>> into unusable address space which happens to be reserved in e820.  This

>> seems very difficult to disambiguate from the above case through any

>> algorithm that I can think of.

>

> Yeah, well, the good news is that it should be fairly rare. Any sane PCI

> device will come out of reset with IO and MEM disabled, and even if some

> crazy BIOS enables IO/MEM on it and activates the BAR's with some random

> content, I'm not seeing how that would work well with Windows either if it

> really was overlapping with some critical real other piece of hardware.

>

> So I'd _assume_ that something like that would break Windows too, and thus

> not actually make it into a real product.

> 

I believe you are right.
I think the key bit here is that if the IO or MEM bit is enabled, it's

likely to be initialized.  The PCI specs say that BARs should come out

of reset initialized to zero, but I know for a fact that at least

several Broadcom chips don't -- however, the combination of BAR and

enable bits should be enough of a sentry.
	-hpa

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