Re: [PATCH 2.6.27-rc4] irq: irq and pci_ids patch for Intel Ibex Peak DeviceIDs

Previous thread: [PATCH 2.6.27-rc4] i2c-i801: SMBus patch for Intel Ibex Peak DeviceIDs by Seth Heasley on Wednesday, August 27, 2008 - 4:52 pm. (2 messages)

Next thread: libata, Sound on same IRQ : flaky sound by Robert M. Stockmann on Wednesday, August 27, 2008 - 5:06 pm. (4 messages)
From: Seth Heasley
Date: Wednesday, August 27, 2008 - 4:58 pm

This patch updates the Intel Ibex Peak (PCH) LPC and SMBus Controller DeviceIDs.

Signed-off-by: Seth Heasley <seth.heasley@intel.com>

--- linux-2.6/include/linux/pci_ids.h.orig	2008-08-27 11:54:07.000000000 -0700
+++ linux-2.6/include/linux/pci_ids.h	2008-08-27 12:01:53.000000000 -0700
@@ -2428,9 +2428,39 @@
 #define PCI_DEVICE_ID_INTEL_ICH10_3	0x3a1a
 #define PCI_DEVICE_ID_INTEL_ICH10_4	0x3a30
 #define PCI_DEVICE_ID_INTEL_ICH10_5	0x3a60
-#define PCI_DEVICE_ID_INTEL_PCH_0	0x3b10
-#define PCI_DEVICE_ID_INTEL_PCH_1	0x3b11
-#define PCI_DEVICE_ID_INTEL_PCH_2	0x3b30
+#define PCI_DEVICE_ID_INTEL_PCH_0	0x3b00
+#define PCI_DEVICE_ID_INTEL_PCH_1	0x3b01
+#define PCI_DEVICE_ID_INTEL_PCH_2	0x3b02
+#define PCI_DEVICE_ID_INTEL_PCH_3	0x3b03
+#define PCI_DEVICE_ID_INTEL_PCH_4	0x3b04
+#define PCI_DEVICE_ID_INTEL_PCH_5	0x3b05
+#define PCI_DEVICE_ID_INTEL_PCH_6	0x3b06
+#define PCI_DEVICE_ID_INTEL_PCH_7	0x3b07
+#define PCI_DEVICE_ID_INTEL_PCH_8	0x3b08
+#define PCI_DEVICE_ID_INTEL_PCH_9	0x3b09
+#define PCI_DEVICE_ID_INTEL_PCH_10	0x3b0a
+#define PCI_DEVICE_ID_INTEL_PCH_11	0x3b0b
+#define PCI_DEVICE_ID_INTEL_PCH_12	0x3b0c
+#define PCI_DEVICE_ID_INTEL_PCH_13	0x3b0d
+#define PCI_DEVICE_ID_INTEL_PCH_14	0x3b0e
+#define PCI_DEVICE_ID_INTEL_PCH_15	0x3b0f
+#define PCI_DEVICE_ID_INTEL_PCH_16	0x3b10
+#define PCI_DEVICE_ID_INTEL_PCH_17	0x3b11
+#define PCI_DEVICE_ID_INTEL_PCH_18	0x3b12
+#define PCI_DEVICE_ID_INTEL_PCH_19	0x3b13
+#define PCI_DEVICE_ID_INTEL_PCH_20	0x3b14
+#define PCI_DEVICE_ID_INTEL_PCH_21	0x3b15
+#define PCI_DEVICE_ID_INTEL_PCH_22	0x3b16
+#define PCI_DEVICE_ID_INTEL_PCH_23	0x3b17
+#define PCI_DEVICE_ID_INTEL_PCH_24	0x3b18
+#define PCI_DEVICE_ID_INTEL_PCH_25	0x3b19
+#define PCI_DEVICE_ID_INTEL_PCH_26	0x3b1a
+#define PCI_DEVICE_ID_INTEL_PCH_27	0x3b1b
+#define PCI_DEVICE_ID_INTEL_PCH_28	0x3b1c
+#define PCI_DEVICE_ID_INTEL_PCH_29	0x3b1d
+#define PCI_DEVICE_ID_INTEL_PCH_30	0x3b1e
+#define PCI_DEVICE_ID_INTEL_PCH_31	0x3b1f
+#define PCI_DEVICE_ID_INTEL_PCH_32	0x3b30
 #define ...
From: Jean Delvare
Date: Thursday, August 28, 2008 - 12:49 am

Hi Seth,


Changing device ID definitions that way is really bad practice. It

BTW, what's the point of these defines? I get the idea of giving nice
names to device IDs if these names are explicit and really describe the
device. But the Intel south bridge device names are nothing more than
arbitrary numbers, so you are replacing a set of arbitrary numbers by
another set of arbitrary numbers. I see little benefit in doing this,
given the cost it has. For what it's worth, several subsystems (ata,
sound...) have already stopped using these defines and I understand
them completely: depending on changes done to include/linux/pci_ids.h
is more pain than is worth.

Can't we stop defining these IDs now and start using the hexadecimal

I am no PCI IRQ routing expert, but I have to admit that I a bit
skeptical that all the PCH functions are IRQ routers. You're adding as
many entries here for the PCH than there have been for all Intel chips


-- 
Jean Delvare
--

From: Jesse Barnes
Date: Thursday, August 28, 2008 - 7:12 am

Yeah, this has me confused now too.  I remember specifically asking if the 
other PCHs needed to be added to this list when the last patch was applied.  
What happened?  Can you give us some more background here, Seth?  The 
changelog should definitely include an explanation of why the IDs need to be 
changed (i.e. why the old commit was wrong).

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center
--

From: Heasley, Seth
Date: Thursday, August 28, 2008 - 8:18 am

I'm not sure what's "messy," given that I changed what was required to be changed, then added the new IDs.  These IDs are as follows:

LPC Controller: 3b00-3b1f (final ID set in Firmware, but 32 possibilities)
SMBus: 3b30

In terms of the irq stuff, I'm adding only the LPC Controller IDs there.  There are just a lot of them.  Normally we have a handful of IDs, but in this case the list is longer.

I suppose what "messy" means is, I should have kept the existing defines and only added the new?  I can resubmit if that's the way it should be done.

I will also patch the Documentation file.  It wasn't in the list I was given by Jason, but I'm onboard with saving Jean the trouble.

Please advise on how I should proceed here.

-Seth
--

From: Jean Delvare
Date: Thursday, August 28, 2008 - 8:30 am

So basically, you (Intel) have no clue what IDs will be used, and
instead of waiting until you have the information, you prefer to add a
bunch of device IDs to the Linux kernel, most of which will never
exist? This is making the kernel code bigger and slower. Not by much,
but still... That's bad engineering, really. Especially if you don't
clean up afterwards, as happens to be the case for the ICH10. I
compared the ICH10 datasheet with the IDs we have in the kernel and
only 3 of the 6 defined device IDs are actually used by existing ICH10

That's one part of the messiness, yes. Which underlines how bad the


I gave my opinion on it - now up to Jesse to decide.

-- 
Jean Delvare
--

From: Heasley, Seth
Date: Thursday, August 28, 2008 - 8:40 am

I can't speak to the engineering, although I agree that blocking out 32 IDs is strange.  I don't believe it's a matter of not knowing what will be used but rather that the firmware has the flexibility to change the ID in that range.


I have no history here, but I'm inclined to agree it's a strange naming scheme.

-Seth
--

Previous thread: [PATCH 2.6.27-rc4] i2c-i801: SMBus patch for Intel Ibex Peak DeviceIDs by Seth Heasley on Wednesday, August 27, 2008 - 4:52 pm. (2 messages)

Next thread: libata, Sound on same IRQ : flaky sound by Robert M. Stockmann on Wednesday, August 27, 2008 - 5:06 pm. (4 messages)