Re: [PATCH] x86: let 64 bit to use 32 bit calibrate_apic_clock

Previous thread: by Yinghai Lu on Sunday, August 24, 2008 - 10:39 pm. (1 message)

Next thread: Re: Quad core CPUs loaded at only 50% when running a CPU and mmap intensive multi-threaded task by Peter Zijlstra on Sunday, August 24, 2008 - 10:51 pm. (17 messages)
From: Yinghai Lu
Date: Sunday, August 24, 2008 - 10:41 pm

Signed-of-by: Yinghai Lu <yhlu.kernel@gmail.com>

---
 arch/x86/kernel/apic.c |   92 ++-----------------------------------------------
 1 file changed, 5 insertions(+), 87 deletions(-)

Index: linux-2.6/arch/x86/kernel/apic.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/apic.c
+++ linux-2.6/arch/x86/kernel/apic.c
@@ -478,90 +478,6 @@ static void __cpuinit setup_APIC_timer(v
 	clockevents_register_device(levt);
 }
 
-#ifdef CONFIG_X86_64
-/*
- * In this function we calibrate APIC bus clocks to the external
- * timer. Unfortunately we cannot use jiffies and the timer irq
- * to calibrate, since some later bootup code depends on getting
- * the first irq? Ugh.
- *
- * We want to do the calibration only once since we
- * want to have local timer irqs syncron. CPUs connected
- * by the same APIC bus have the very same bus frequency.
- * And we want to have irqs off anyways, no accidental
- * APIC irq that way.
- */
-
-#define TICK_COUNT 100000000
-
-static int __init calibrate_APIC_clock(void)
-{
-	unsigned apic, apic_start;
-	unsigned long tsc, tsc_start;
-	int result;
-
-	local_irq_disable();
-
-	/*
-	 * Put whatever arbitrary (but long enough) timeout
-	 * value into the APIC clock, we just want to get the
-	 * counter running for calibration.
-	 *
-	 * No interrupt enable !
-	 */
-	__setup_APIC_LVTT(250000000, 0, 0);
-
-	apic_start = apic_read(APIC_TMCCT);
-#ifdef CONFIG_X86_PM_TIMER
-	if (apic_calibrate_pmtmr && pmtmr_ioport) {
-		pmtimer_wait(5000);  /* 5ms wait */
-		apic = apic_read(APIC_TMCCT);
-		result = (apic_start - apic) * 1000L / 5;
-	} else
-#endif
-	{
-		rdtscll(tsc_start);
-
-		do {
-			apic = apic_read(APIC_TMCCT);
-			rdtscll(tsc);
-		} while ((tsc - tsc_start) < TICK_COUNT &&
-				(apic_start - apic) < TICK_COUNT);
-
-		result = (apic_start - apic) * 1000L * tsc_khz /
-					(tsc - tsc_start);
-	}
-
-	local_irq_enable();
-
-	printk(KERN_DEBUG "APIC timer calibration ...
From: Ingo Molnar
Date: Monday, August 25, 2008 - 12:47 am

applied to tip/irq/sparseirq - thanks Yinghai.


wouldnt this be a (small) fix for the pre-unification 32-bit side as 
well, which we should put into tip/x86/urgent as well?

	Ingo
--

From: Yinghai Lu
Date: Monday, August 25, 2008 - 1:04 am

64bit have those MACRO, it seems when CONFIG_EMBEDDED is set, could
reduce some size if pm is not selected.

it seems not be urgent for 2.6.27.

YH
--

From: Cyrill Gorcunov
Date: Monday, August 25, 2008 - 9:47 am

[Yinghai Lu - Mon, Aug 25, 2008 at 01:04:34AM -0700]
| On Mon, Aug 25, 2008 at 12:47 AM, Ingo Molnar <mingo@elte.hu> wrote:
| >
| > * Yinghai Lu <yhlu.kernel@gmail.com> wrote:
| >
| >> Signed-of-by: Yinghai Lu <yhlu.kernel@gmail.com>
| >
| > applied to tip/irq/sparseirq - thanks Yinghai.
| >
| > btw., why was this bit needed:
| >
| >> @@ -659,6 +575,7 @@ static int __init calibrate_APIC_clock(v
| >>       delta = lapic_cal_t1 - lapic_cal_t2;
| >>       apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta);
| >>
| >> +#ifdef CONFIG_X86_PM_TIMER
| >>       /* Check, if the PM timer is available */
| >>       deltapm = lapic_cal_pm2 - lapic_cal_pm1;
| >>       apic_printk(APIC_VERBOSE, "... PM timer delta = %ld\n", deltapm);
| >> @@ -687,6 +604,7 @@ static int __init calibrate_APIC_clock(v
| >>               }
| >>               pm_referenced = 1;
| >>       }
| >> +#endif
| >
| > wouldnt this be a (small) fix for the pre-unification 32-bit side as
| > well, which we should put into tip/x86/urgent as well?
| 
| 64bit have those MACRO, it seems when CONFIG_EMBEDDED is set, could
| reduce some size if pm is not selected.
| 
| it seems not be urgent for 2.6.27.
| 
| YH
| 

Hey, APIC_DIVISOR is now wrong - it should be 16 for both modes
then, shouldn't it? :)

		- Cyrill -
--

From: Yinghai Lu
Date: Monday, August 25, 2008 - 1:05 pm

why?


could make for 64 to use 16 too.

YH
--

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Next thread: Re: Quad core CPUs loaded at only 50% when running a CPU and mmap intensive multi-threaded task by Peter Zijlstra on Sunday, August 24, 2008 - 10:51 pm. (17 messages)