>
quoted text
>> Still, I'd like Jeff to show his C, the resulting asm and the intent for
>> the volatile and barrier versions of his code (well, little snippets of
>> his code obviuosly).
>>
>> Either he doesn't understand barriers (nothing to be ashamed about), or
>> we might have more trouble lurking in the rest of the kernel.
>
> Sounds fair to me!
>
> 							Thanx, Paul
>

I have thoroughly reviewed Linux memory barriers and the efficacy of the
barriers as defined in Linux are not the issue here.  the code segment
discussed sits and spins on a variable waiting for a specific state, and
its a spinlock which creates a hard barrier, so no amount of barrier usage
should nor does matter here.  Even if a processor was late in flushing its
writes, sooner or later the spinning processor would see the change in the
shared memory address -- IF IT WERE ACTUALLY A SHARED REFERENCE.  What I
am seeing is not an issue of races between processors on load/store
operations, but cases where gcc has chosen to optimize away global
references entirely.

Jeff

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