Cc: Eric W. Biederman <ebiederm@...>, Ingo Molnar <mingo@...>, Thomas Gleixner <tglx@...>, Dhaval Giani <dhaval@...>, Mike Travis <travis@...>, Andrew Morton <akpm@...>, <linux-kernel@...>
No, but the mapping from MSI-X vectors to -> {CPU, IDT} is arbitrary, as
the MSI(-X) address and data registers contain the target CPU and
destination vector, respectively. However, we may have to manage the
mappings directly, to re-use IDT entries and provide interrupt balancing.
-hpa
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