Cc: Linus Torvalds <torvalds@...>, H. Peter Anvin <hpa@...>, Jeremy Fitzhardinge <jeremy@...>, Andrew Morton <akpm@...>, Ingo Molnar <mingo@...>, Joe Perches <joe@...>, <linux-kernel@...>, Steven Rostedt <rostedt@...>
It strikes me that Intel has a nice (probably slow?) cmpxchg16b
instruction on x86_64. Therefore, we could atomically update 128 bits,
which gives the following table :
((127 - 2T) / (T + 1)) + 1 >= NR_PRIORITIES
Thread bits | Max number of threads | Number of priorities
63 | 2^63 | 1
42 | 2^42 | 2
31 | 2^31 | 3
24 | 2^24 | 4
20 | 2^20 | 5
17 | 131072 | 6
15 | 32768 | 7
13 | 8192 | 8
11 | 2048 | 9
10 | 1024 | 10
9 | 512 | 11
8 | 256 | 13
7 | 128 | 15
6 | 64 | 17
5 | 32 | 20
4 | 16 | 24
.. where we have more priorities than threads.
So I wonder if having in the surrounding of 10 priorities, which could
dynamically adapt the number of threads to the number of priorities
available, could be interesting for the RT kernel ?
That would however depend on the very architecture-specific cmpxchg16b.
Mathieu
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Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
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