While looking at the patch yesterday I was thinking the same thing. Now it
bugs me that this observation didn't occur when I was working on this
problem. Maybe the code symmetry makes it look "correct".
You're probably correct. A race condition that intermittently clears a
pending interrupt fits the observed symptom.
For my at91sam9260 board, I eliminated one cause of SPI overruns by lowering
the interrupt priorities of the six USARTs (default was 5, changed to 4)
relative to the two SPI controllers (default is 5). The test I used for
this issue is 'ls -lR' on the flash filesystem.
Regards -- Gerard
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