Yes, that's how some of the early mmc-spi work was done. ;)
ISTR a patch for that, sitting somewhere in my mailbox waiting
for review cycles. I've sent examples of such stuff around
before too.
I've held back submitting a spi-gpio driver until I could come
up with a way to configure it which would let the GPIO calls
get inlined ... because otherwise, there's a nasty speed penalty.
It's the difference between a function call per GPIO operation
and an instruction per GPIO operation. Consider that each SPI
clock cycle requires four such operations, and GPIO function
calls often take 30 instructions ... there's a big penalty to
the non-inlined bitbangers, which is only partly addressed by
having those function calls sitting in I-cache.
- Dave
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