On Tue, 3 Jun 2008 21:01:54 -0700
"Alok kataria" <alokkataria1@gmail.com> wrote:

quoted text
> On Tue, Jun 3, 2008 at 6:20 PM, Arjan van de Ven
> <arjan@infradead.org> wrote:
> > On Tue, 03 Jun 2008 17:41:09 -0700
> > Alok Kataria <akataria@vmware.com> wrote:
> >
> >> On X86 platform we can use the value of cpu_khz computed during tsc
> >> calibration to calculate the loops_per_jiffy value. Its very
> >> important to keep the error in lpj values to minimum as any error
> >> in that may result in kernel panic in check_timer.
> >> In virtualization environment on a highly overloaded host, the
> >> guest delay calibration may sometimes result in errors beyond the
> >> ~50% that timer_irq_works can handle, resulting in the guest
> >> panicking.
> > \
> >
> > can you guarantee that the rate tsc ticks at is the same as the
> > current CPU frequency? Answer: You can't....
> >
> 
> I think at the boot time atleast we can assume that, no ?

Nope, absolutely not.
1) The rate TSC ticks may or may not be the maximum frequency (usually
is, but no guarantee)
2) The BIOS might not boot your system at the maximum frequency (think
"laptop on battery")... that's really up to the BIOS.

quoted text
> 
> > sadly we do need to calibrate this...
> >
> > In addition, clearly you can have different cpus in a system run at
> > a different rate (both in terms of cpu_khz and, independently, in
> > terms of tsc rate)
> >
> 
> Again yes at run time frequency's may change but they shouldn't at
> boottime. AFAIK, i don't think there are X86 MP systems with
> asymmetric cpus i.e. systems with different
> base frequencies. If thats not true then there sure is a problem.

there's nothing that guarantees this. (Well maybe Dell's website does
because they want to sell you 2 expensive cpus rather than 1 cheap 1
expensive one ;-)

quoted text
> 
> Thanks,
> Alok
> 
> >
> > --
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> > visit http://www.lesswatts.org
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