Cc: Nick Piggin <nickpiggin@...>, Russell King <rmk+lkml@...>, Benjamin Herrenschmidt <benh@...>, David Miller <davem@...>, <linux-arch@...>, <scottwood@...>, <linuxppc-dev@...>, <alan@...>, <linux-kernel@...>
With both registers in a WC+ area, yes. The write may be in the WC buffers
until the WC buffers are flushed (short list: a fence, a serializing
instruction, a read-write to uncached memory, or an interrupt. There are
others, but those are the main ones).
But if the status register is in uncached memory (which is the only *sane*
thing to do), then it doesn't matter if the control register is in WC
memory. Because the status register read is itself serializing with the WC
buffer, it's actually fine.
So this is used for putting things like ring queues in WC memory, and fill
them up with writes, and get nice bursty write traffic with the CPU
automatically buffering it up (think "stdio.h on a really low level"). And
if you then have the command registers in UC memory or using IO port
accesses, reading and writing to them will automatically serialize.
Not on x86.
And I don't care what anybody else says - x86 is *so* totally dominant,
that other architectures have to live with the fact that 99.9% of all
drivers are written for and tested on x86. As a result, anything else is
"theory".
Are some drivers good and are careful? Yes. Are most? No, and even if they
were, people making changes would mostly test them on x86. Architectures
should strive to basically act as closely as possible to x86 semantics in
order to not get nasty surprises.
And architectures that can't do that well enough *will* often find that
they need to fix drivers, and only a small small subset of all kernel
drivers will generally work out-of-the-box.
If you're ready to do that, your architecture can do anything it damn well
pleases ;)
Linus
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