Cc: Jes Sorensen <jes@...>, Roland Dreier <rdreier@...>, <benh@...>, Arjan van de Ven <arjan@...>, <linux-arch@...>, <linux-kernel@...>, <tpiepho@...>, <linuxppc-dev@...>, <scottwood@...>, <torvalds@...>, David Miller <davem@...>, <alan@...>
On Tue, Jun 03, 2008 at 06:19:05PM +1000, Nick Piggin wrote:
No posted writes are.
As I recall, the outX functions are not supposed to be posted, so the sn2
versions issue a mmiowb in the outX. But writeX has always been posted,
or at least postable. I thought that was generally accepted.
Normally, the only way for a device to see cacheable memory is via a DMA
read, and you are guaranteed on sn2 that in the following:
store of of A to location X
mmio write to device
device DMA read from location X
that the device will see A. In the past, on some other archs, you'd have
to flush the Dcache for that to work.
Granted, if the compiler reorders the store and the mmio write, then you
have a problem.
jeremy
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