On Thu, 08 May 2008 14:40:20 -0700 Alexis Bruemmer <alexisb@us.ibm.com> wrote:I'm not sure that I correctly understand what you want. You mean that the Calgary IOMMU code ignores device's dma_mask and gives addresses above 4GB or the Calgary IOMMU code wrongly handles devices that are not behind the Calgary? If you refers to the former problem, other IOMMU implementations do something like this. diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index e28ec49..2a977bc 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c @@ -268,21 +268,37 @@ static unsigned long iommu_range_alloc(struct device *dev, { unsigned long flags; unsigned long offset; + unsigned long limit; unsigned long boundary_size; + unsigned long start; + unsigned long mask; boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, PAGE_SIZE) >> PAGE_SHIFT; BUG_ON(npages == 0); + if (dev->dma_mask) + mask = *dev->dma_mask >> PAGE_SHIFT; + else + mask = 0xfffffffful >> PAGE_SHIFT; + + limit = tbl->it_size; + start = tbl->it_hint; + + if (limit > mask) { + limit = mask + 1; + start = tbl->it_hint & mask; + } + spin_lock_irqsave(&tbl->it_lock, flags); - offset = iommu_area_alloc(tbl->it_map, tbl->it_size, tbl->it_hint, + offset = iommu_area_alloc(tbl->it_map, limit, start, npages, 0, boundary_size, 0); if (offset == ~0UL) { tbl->chip_ops->tce_cache_blast(tbl); - offset = iommu_area_alloc(tbl->it_map, tbl->it_size, 0, + offset = iommu_area_alloc(tbl->it_map, limit, 0, npages, 0, boundary_size, 0); if (offset == ~0UL) { printk(KERN_WARNING "Calgary: IOMMU full.\n"); --
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