On 07-05-08 21:39, Daniel Hazelton wrote:

quoted text
> HPA asked about why they used a whitelist instead of a blacklist in [1]. The 
> answer (in [2]) was that those are the CPU's that are guaranteed to properly 
> support PAT (no known or potential errata). However in [3] Dean Gaudet 
> complained about the AMD detection code having a limit that the Intel 
> detection code did not.

And in that thread both HPA and Ingo Molnar -- two of the three x86 arch
maintainers -- agreed that a whitelist is the wrong approach, with HPA
commenting that it lead to vendor lockin. And here I am talkng to an
Intel employee about why my entire AMD CPU family was excluded.

So why is this thing now in mainline with Ingo's sign-off and not a line
of changelog to explain it?

quoted text
>                      ^^^^^---- Here in Rene's patch...

Yinghai's.

quoted text
> Wouldn't this be better if written the same as the Intel side, ie:
> if (c->x86 >= 0xF && (c->x86 == 6 && c->x86_model == 7))
> (or even with c->x86_model >= 7  ?)

I doubt it, given that that condition would optimize to 0 but assuming
s/&&/||/ that's still excluding my previous Duron model 4 which, as far
as I'm aware, had functional PAT as well. Nor am I myself aware of any
model 1 trouble. Really, this whitelist seems a pretty bad idea.

quoted text
> [1] http://lkml.org/lkml/2008/3/25/118
> [2] http://lkml.org/lkml/2008/3/25/292
> [3] http://lkml.org/lkml/2008/3/30/37

Questions...

-- Why is this thing in with the whitelist over the objection of arch
   maintainers?
-- why is this thing in without a single line of changelog?
-- Why does this thing hide the fact that my CPU does have PAT from
   me (even though it might elect to not trust it)?

Rene.

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