On Wed, 2008-05-21 at 12:44 -0700, Trent Piepho wrote:
There have been long discussions about that. The end result was that
being too weakly ordered is just asking for trouble because the majority
of drivers are written & tested on x86 which is in order.
If you look at our accessors, minus that gcc problem you found, the
barriers in there should pretty much guarantee ordering in the cases
that matter, which are basically MMIO read followed by memory accesses
and memory writes followed by MMIO. In fact, MMIO read are fully
sychronous.
Ok, so there is a very bad bug indeed, we need to fix that.
Ben.
--