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RE: HELP: Is writeq an atomic operation??
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From:
Moore, Eric <Eric.Moore@...>
To: Roland Dreier <rdreier@...>
Cc: David Miller <davem@...>, <linux-scsi@...>, <linux-kernel@...>
Subject:
RE: HELP: Is writeq an atomic operation??
Date: Friday, May 2, 2008 - 7:31 pm
On Friday, May 02, 2008 5:22 PM, Roland Dreier wrote:
quoted text
> > Yeah, I forgot I have a #ifndef writeq, then defined the > x86_64 version > > of that. I've not tested on x86, so I'm not sure whether > it works. > > How are you handling writeq when its not defined, as the > case in x86? > > Write two writel() inside a spinlock to avoid any transactions in the > middle (the HW I'm dealing with can deal with two 32-bit transactions, > as long as nothing comes in the middle). If your hardware demands a > single 64-bit transaction, you may be in trouble, because I'm not sure > all 32-bit systems can generate such a PCIe transaction. > > You can see include/linux/mlx4/doorbell.h for exactly what I did. >
Thanks for the code sample. Yes, I need to send a single atomic 64-bit transaction. Eric --
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Messages in current thread:
Re: HELP: Is writeq an atomic operation??
, David Miller
, (Fri May 2, 6:32 pm)
Re: HELP: Is writeq an atomic operation??
, Roland Dreier
, (Fri May 2, 6:43 pm)
RE: HELP: Is writeq an atomic operation??
, Moore, Eric
, (Fri May 2, 6:49 pm)
Re: HELP: Is writeq an atomic operation??
, Roland Dreier
, (Fri May 2, 6:53 pm)
RE: HELP: Is writeq an atomic operation??
, Moore, Eric
, (Fri May 2, 7:13 pm)
Re: HELP: Is writeq an atomic operation??
, Roland Dreier
, (Fri May 2, 7:21 pm)
RE: HELP: Is writeq an atomic operation??
, Moore, Eric
, (Fri May 2, 7:31 pm)
Re: HELP: Is writeq an atomic operation??
, David Miller
, (Fri May 2, 6:49 pm)
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