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Re: [patch 13/17] Immediate Values - x86 Optimization
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From:
H. Peter Anvin <hpa@...>
To: Mathieu Desnoyers <mathieu.desnoyers@...>
Cc: <akpm@...>, Ingo Molnar <mingo@...>, <linux-kernel@...>, Andi Kleen <andi@...>, Rusty Russell <rusty@...>, Andi Kleen <ak@...>, Chuck Ebbert <cebbert@...>, Christoph Hellwig <hch@...>, Jeremy Fitzhardinge <jeremy@...>, Thomas Gleixner <tglx@...>, Ingo Molnar <mingo@...>, Adrian Bunk <bunk@...>, Alexey Dobriyan <adobriyan@...>, <akpm@...>
Subject:
Re: [patch 13/17] Immediate Values - x86 Optimization
Date: Wednesday, April 9, 2008 - 2:01 pm
Mathieu Desnoyers wrote:
quoted text
> Ok, so the most flexible solution that I see, that should fit for both > x86 and x86_64 would be : > 1 byte : "=q" : "a", "b", "c", or "d" register for the i386. For > x86-64 it is equivalent to "r" class (for 8-bit > instructions that do not use upper halves). > 2, 4, 8 bytes : "=r" : A register operand is allowed provided that it is in a > general register.
Any reason to keep carrying this completely misleading comment chunk still? -hpa --
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Messages in current thread:
[patch 13/17] Immediate Values - x86 Optimization
, Mathieu Desnoyers
, (Wed Apr 9, 11:08 am)
Re: [patch 13/17] Immediate Values - x86 Optimization
, H. Peter Anvin
, (Wed Apr 9, 2:01 pm)
Re: [patch 13/17] Immediate Values - x86 Optimization (updat...
, Mathieu Desnoyers
, (Wed Apr 9, 4:21 pm)
Re: [patch 13/17] Immediate Values - x86 Optimization (updat...
, H. Peter Anvin
, (Wed Apr 9, 6:33 pm)
Re: [patch 13/17] Immediate Values - x86 Optimization (updat...
, Mathieu Desnoyers
, (Wed Apr 9, 7:15 pm)
Re: [patch 13/17] Immediate Values - x86 Optimization
, Mathieu Desnoyers
, (Wed Apr 9, 3:08 pm)
Re: [patch 13/17] Immediate Values - x86 Optimization
, H. Peter Anvin
, (Wed Apr 9, 6:33 pm)
Re: [patch 13/17] Immediate Values - x86 Optimization
, Mathieu Desnoyers
, (Wed Apr 9, 8:42 pm)
Re: [patch 13/17] Immediate Values - x86 Optimization
, H. Peter Anvin
, (Wed Apr 9, 8:47 pm)
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