Yes, I've been getting this for some days too: only 2 processors on
dual Xeon HT in 32-bit mode; whereas x86_64 finds all 4 just fine.
Ran lots of testing on 2.6.25-mm1 before I noticed it there.
I bisected for a while, but it got confusing (arrived at a bisect
point which gave only 1 processor: smpboot code getting rearranged),
so I was forced (quel horreur!) to investigate properly. I've just
now had success with the patch below, please give it a try:
I presume this warning and backtrace is what you report as an oops:
I think you'll find Linus included a fix for this one overnight, and
it should have gone away in 2.6.25-git15 (but I didn't see it myself).
Hugh
[PATCH] x86_32: fix HT cpu booting
Since recent smpboot 32/64-bit merge, my dual Xeon with HT has been
booting only 2 of its 4 cpus (when running an i386 kernel; but x86_64
is okay). J.A. Magall=C3=B3n reports the same.
native_cpu_up: bad cpu 2
native_cpu_up: bad cpu 3
The mach-default cpu_present_to_apicid() was just returning cpu number
(2, 3) instead of apicid (6, 7): looks like we now need the x86_64 code
even for the i386 case.
Comparing with other versions of cpu_present_to_apicid(), it seems a
good idea to include an NR_CPUS test too, since cpu_present() doesn't
include that; but that wasn't a problem here, and may no problem at all.
One point worth noting - is it a worry? Prior to that smpboot merge,
my Xeon booted the two HT siblings on one physical first, then the
two siblings on the other physical after - when i386, but alternated
them when x86_64. Since the merge, the x86_64 sequence is unchanged,
but the i386 sequence is now like x86_64. I prefer this consistency,
and I prefer the new sequence: booting with maxcpus=3D2 then uses the
independent physicals without HT sharing; but surprises in store?
Signed-off-by: Hugh Dickins <hugh@veritas.com>
--- 2.6.25-git/include/asm-x86/mach-default/mach_apic.h=092008-04-23 07:24:=
16.000000000 +0100
+++ ...
