On Mon, 2008-04-28 at 07:10 -0700, Arjan van de Ven wrote:No ... it works for me, and caching is a performance advantage for me too. The only current consumer of this API is the NCR_Q720 SCSI card which keeps a bunch of cacheable memory remote across the MCA bus. If you think about it logically, most busses are second citizens in the caching hierarchy: they really only get to force a flush and invalidate of the CPU cache line rather than being fully participatory in the coherence protocol. However, even being second class is enough of a speed up on slow busses because it allows bursting of the cache line for the bus transfers. The other consumers are SoC embedded ... so yes, perhaps I should ask about this on linux-arch. James --
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