Re: [PATCH] pci_try_set_mwi() in sata_promise

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From: Marin Mitov
Date: Wednesday, April 23, 2008 - 11:15 am

On Wednesday 23 April 2008 05:46:49 pm Grant Grundler wrote:

My understanding of MWI is different. It concerns full cache line writes.
In that case the CPU can invalidate the cache line (without flushing it to 
RAM). While in case of partial cache line writes, the processor should 
flush the cache line before the controller writes to corresponding cached 
address and then the controller finishes its partial cache line write to RAM.
In case MWI is NOT enables the CPU should flushe every cache line  touched
by the controller's DMA machine, nevertheless it will be overwritten latter.

But, as usual, I could be wrong :-)


Agreed.


That is the reason why pci_set_mwi() and pci_try_set_mwi() exist.

Marin Mitov



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Messages in current thread:
[PATCH] pci_try_set_mwi() in sata_promise, Marin Mitov, (Tue Apr 22, 11:26 am)
Re: [PATCH] pci_try_set_mwi() in sata_promise, Mikael Pettersson, (Wed Apr 23, 12:57 am)
Re: [PATCH] pci_try_set_mwi() in sata_promise, Marin Mitov, (Wed Apr 23, 5:31 am)
Re: [PATCH] pci_try_set_mwi() in sata_promise, Marin Mitov, (Wed Apr 23, 5:34 am)
Re: [PATCH] pci_try_set_mwi() in sata_promise, Marin Mitov, (Wed Apr 23, 6:33 am)
Re: [PATCH] pci_try_set_mwi() in sata_promise, Grant Grundler, (Wed Apr 23, 7:46 am)
Re: [PATCH] pci_try_set_mwi() in sata_promise, Marin Mitov, (Wed Apr 23, 11:15 am)